Description
This application provides an intuitive graphical user interface (GUI) that allows users to quickly generate Verilog code for digital circuit design. In addition to code generation, the app also supports browsing VCD (Value Change Dump) data, making it easier to inspect and analyze simulation results.
Contact us: [email protected]
Terms of Use: https://www.apple.com/legal/internet-services/itunes/dev/stdeula/
Privacy Policy: https://www.aipesd.com/en/%E9%9A%B1%E7%A7%81%E6%AC%8A%E8%81%B2%E6%98%8E/